Isolated Single-ended Primary-inductive Converter with a Soft-switching Cell for Implementing Features of Zero-voltage Switching and Zero-current Switching

In this paper, an isolated single-ended primary-inductive converter (ISEPIC) with a softswitching cell for implementing features of zero-voltage switching (ZVS) and zero-current switching (ZCS) is proposed. The ISEPIC has the following advantages: (1) By changing the inductor element of the ISEPIC into a transformer element, the features of electrical isolation can be achieved. (2) By incorporating a soft-switching cell, the power switches (MOSFETs) of the ISEPIC can achieve ZVS and ZCS features during turn-on conditions. Therefore, the power losses of the power switches can be reduced during the turn-on transient, and the overall efficiency of the ISEPIC can be increased significantly. Finally, a prototype of the ISEPIC with a soft-switching cell is built. Experimental results are presented to verify the performance and feasibility of the proposed ISEPIC for implementing features of ZVS and ZCS.


Introduction
A number of nonisolated switching power converters have been developed and proposed. (1) For example, Buck, Boost, Cuk, single-ended primary-inductive converter (SEPIC), and Zeta converters have attracted interest, which have simple structures and are widely used at low and medium powers. A nonisolated SEPIC is often adopted for step-down and step-up voltage applications, as shown in Fig. 1. However, the hard-switching conditions of the active switch (MOSFET) are a major contributor to switching losses in a nonisolated SEPIC, resulting in high power losses, high electromagnetic interference (EMI), and low conversion efficiency. To overcome these problems, a number of soft-switching techniques have been proposed. (2)(3)(4)(5) Softswitching techniques improve the imperfect switching of power switches and thereby eliminate switching losses and EMI. Several soft-switching techniques have been developed in recent years. The soft-switching techniques can be divided into zero-voltage-switching (ZVS) and zero-current-switching (ZCS) techniques. (6)(7)(8)(9)(10) Both techniques drive the voltage or current of the active switch to zero before any switching action, and avoid a concurrent high voltage and high current in the switching transition. A SEPIC with ZVS and ZCS techniques will have no voltage and no current across the power switch at turn-on and turn-off transitions, as illustrated in Figs. 2 and 3, respectively.
In this paper, an isolated single-ended primary-inductive converter (ISEPIC) with a softswitching cell for implementing features of ZVS and ZCS is presented, as shown in Fig. 4. The soft-switching cell has a simple structure, which consists of a transformer (T 1 ) and an auxiliary switch (M 2 ) to implement the ZVS feature of the main switch (M 1 ) and the ZCS feature of M 2 . The operational principles of the proposed ISEPIC are described in Sect. 2. Experimental results obtained from a prototype of the proposed ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS are presented in Sect. 3. Finally, a conclusion is given in Sect. 4.

Operational Principles
As shown in Fig. 4, the proposed ISEPIC with features of ZVS and ZCS consists of a SEPIC and a soft-switching cell. The soft-switching cell is composed of an isolated transformer (T r1 ),   M 2 , and a power diode (D c ) to create a ZVS condition for M 1 and a ZCS condition for the auxiliary switch M 2 . The operational principles of the proposed ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS over one switching cycle can be divided into eight major operating modes. Figure 5 shows the current and voltage waveforms of the key components and the driving signals of the switches (M 1 and M 2 ). Figure 6 shows the equivalent circuits of the proposed ISEPIC. To simplify the description of the operational modes, the following assumptions are made: (1) To analyze the ZVS feature, the body diode (D 1 ) and parasitic capacitor (C 1 ) of M 1 will be considered in the steady-state operation of the circuit.
(2) The output filter capacitor (C o ) is large enough for the voltage across it to be constant over a switching cycle.

Mode 1 [Fig. 6(a), t 0 < t < t 1 ]:
At time t 0 , M 1 is turned on, and M 2 is turned off. The inductor current i La flowing through the path V s →L f →M 1 →V s is linearly increased, where V s is an input source and L f is a storage inductor. During this interval, the capacitor (C a ) begins discharging. The current i ca of C a is flowing through the path C a →M 1 →T r2 →C a . At this time, the magnetic inductance current of the transformer (T r2 ) is linearly increased. In the output terminal, the diodes (D a , D b , and D c ) are turned off and the filter capacitor (C 2 ) delivers power to the output load. The inductor current i La can be expressed as The equivalent circuit is shown in Fig. 6(a). Mode 2 [ Fig. 6 At time t 1 , M 1 is turned off, and M 2 remains off. The inductor current i La flowing through the path V s →the main inducter (L a )→C a →T r2 →V s is linearly decreased. On the primary side of T r2 , the magnetizing current i ca is transferred to the secondary side to discharge C b . At this time, D b is turned on by a forward bias, and D a and D c are turned off. The secondary current i cb of T r2 flows through the path T r2 →C b →D b →Load→T r2 . i La can be expressed as 2 1 ( ) ( ). ca The equivalent circuit is shown in Fig. 6(b). Mode 3 [ Fig. 6(c), t 2 < t < t 3 ]: At time t 2 , M 1 remains off and M 2 is turned on. Because the limiting current of the magnetizing inductance (L m1 ) of T r1 increases instantaneously, M 2 has a feature of ZCS in the conduction transient state. At this time, the main inductor current i La is divided and flows through two paths: V s →L a →C a →T r2 →V s and V s →L a →T r1 →M 1 →V s . At this time, the magnetizing inductance current of T r1 is linearly increased. At the output end, because the voltage of C b is discharged to zero, D a is turned on by a forward bias, and the secondary current i cb of T r2 flows through the path T r2 →D a →Load→T r2 . i La can be expressed as The equivalent circuit is shown in Fig. 6(c).

Mode 4 [Fig. 6(d), t 3 < t < t 4 ]:
At time t 3 , M 2 continues to be turned on, and M 1 remains turned off. When the main inductor current i La is equal to the magnetizing inductor current i Tr1 of T r1 , the current flowing through C a drops to zero. At this time, D a , D b , and D c at the output end are turned off by a reverse bias, and the current required by the load is provided by C o . i La can be expressed as The equivalent circuit is shown in Fig. 6(d).

Mode 5 [Fig. 6(e), t 4 < t < t 5 ]:
At time t 4 , M 2 remains on and M 1 remains off. The main inductor current i La continues to decrease linearly, while the magnetizing inductor current i Tr1 of T r1 continues to increase linearly. When the main inductor current i La is smaller than the magnetizing inductance current i Tr1 of T r1 , the magnetizing inductance current i Tr1 of T r1 is divided and flows through two paths: V s →L a →T r1 →M 2 →V s and T r1 →M 2 →C 1 →T r1 . C 1 of M 1 starts to be discharged. At this time, D a , D b , and D c at the output end continue to be reversely biased and cut off, and the current required by the load continues to be provided by C o . i La can be expressed as The equivalent circuit is shown in Fig. 6(e).

Mode 6 [Fig. 6(f), t 5 < t < t 6 ]:
At time t 5 , M 2 continues to be turned on. When the voltage of C 1 of M 1 is discharged to zero, D 1 of M 1 is turned on, providing a zero-voltage conduction characteristic of M 1 . The magnetizing inductance current i Tr1 of T r1 continues to be divided and flow through two paths: V s →L a →T r1 →M 2 →V s and T r1 →M 2 →D 1 →T r1 . At this time, D a , D b , and D c at the output end continue to be reversely biased and cut off, and the current required by the load continues to be provided by C o . i La can be expressed as The equivalent circuit is shown in Fig. 6(f). Mode 7 [ Fig. 6(g), t 6

< t < t 7 ]:
At time t 6 , M 1 is turned on by ZVS, and M 2 continues to be turned on. The current i La of L a starts to increase linearly, while the current flowing through M 1 and T r1 starts to decrease linearly. At this time, D a , D b , and D c at the output end continue to be reversely biased and cut off, and the current required by the load continues to be provided by C o . i La can be expressed as The equivalent circuit is shown in Fig. 6(g).

Mode 8 [Fig. 6(h), t 7 < t < t 8 ]:
At time t 7 , M 1 continues to be turned on, and M 2 is turned off. The current i La of L a flows through the path V s →L a →M 1 →V s , and the main inductor current i La is linearly increased. At the same time, C a starts to discharge, C a current i ca flows through the path C a →M 1 →T r2 →C a , and the magnetizing inductance current of T r2 is linearly increased. On the primary side of T r1 , the magnetizing current i Tr1(pri) is transferred to the secondary side, and then D b and D c are turned on by a forward bias. The secondary current i Tr1(sec) of T r2 flows through the path T r1 →D c →D b →Load→T r1 . i La can be expressed as The operational mode of the proposed ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS over one switching cycle is completed. The equivalent circuit is shown in Fig. 6(h).

Experimental Results
To verify the feasibility of the ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS, a 120 W prototype is built. The specifications of the ISEPIC are listed as follows: • input voltage: V s = 50 V dc , • output voltage: V 01 = 120 V dc , • output current: I 01 = 1 A, • total output power: 120 W, • switching frequency: f = 40 kHz. Figure 7 shows the experimental signal waveforms of M 1 and M 2 at an operating frequency of 40 kHz. Figure 8 shows the experimental voltage and current waveforms of M 1 , from which it can be seen that M 1 has a ZVS feature at the turn-on transition. Figure 9 shows the experimental voltage and current waveforms of M 2 , from which it can be seen that M 2 has a ZCS feature at the turn-on transition. Figure 10 shows the efficiency measurements of the ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS, from which it can be seen that the maximum efficiency can reach as high as 92%, about 4% higher than that of the nonisolated SEPIC (as shown in Fig. 1). The reason for the higher efficiency is that M 1 of the nonisolated SEPIC is still operated in a hard-switching manner during the turn-on and turn-off transitions.

Conclusions
In this study, the proposed ISEPIC with a soft-switching cell for implementing features of ZVS and ZCS has been built and implemented. It uses a soft-switching cell to implement the features of ZVS and ZCS under turn-on transitions for M 1 and M 2 . Therefore, the power losses of the power switches can be reduced during the turn-on transient, and the overall efficiency of the ISEPIC can be increased significantly. The experimental results have verified that the proposed ISEPIC with a soft-switching cell is relatively suitable for the high-frequency requirements of power supplies.