Design and Verification of Stochastic Oscillator Using Multiple Ring Oscillators and OR-gate for Low-voltage Operation in 65 nm CMOS

In this paper, we present a stochastic oscillator comprising multiple ring oscillators and an OR-gate intended for low-supply-voltage operation for the f irst time. To achieve low-supply-voltage operation under a wide range of process variations, multiple ring oscillators are employed. By using an OR-gate, the ring oscillator with the lowest voltage can be utilized, which was confirmed by SPICE simulations. The prototype is fabricated using 65 nm CMOS technology. Measurement results show the effectiveness of the proposed oscillator.


Introduction
The recent progress in IoT is expected to dramatically improve our quality of life. To achieve sustainable development in society, further improvement of power efficiency is essential. One of the most effective approaches for power reduction is to reduce the supply voltage because power consumption is proportional to the square of the supply voltage.
However, state-of-the-art CMOS technology suffers from process variations that limit the reduction in the supply voltage. As discussed in Ref. 1, increasing the number of stages in ring oscillators degrades their operation at low voltages. To resolve this issue, some postfabrication approaches, including individual body-biasing, have been proposed, (2) although such approaches increase the cost of production, making them impractical. The difficulty of lowering the supply voltage inhibits the development of low-voltage applications such as devices powered by biofuel cells. (3) Studies on applications employing biofuel cells have been progressing recently. We have been working on lowering the power by using a biofuel cell not only as a power source but also as a sensing transducer. (4)(5)(6) Improving circuit techniques is helpful for lowering the power. However, the voltage generated by biofuel cells is currently at most about 200 mV, which limits the further improvement of devices powered by biofuel cells. Thus, we must lower the supply voltage of circuits.
We propose and verify the operation of a stochastic oscillator using multiple ring oscillators and an OR-gate for the first time. To achieve low-supply-voltage operation under a wide range of process variations, multiple ring oscillators are employed. By using an OR-gate, the ring oscillator with the lowest voltage can be utilized, as was confirmed by SPICE simulations. The prototype is fabricated using 65 nm CMOS technology. Measurement results show the effectiveness of the proposed oscillator.
The remainder of this paper is organized as follows. In Sect. 2, we introduce the proposed stochastic oscillator using multiple ring oscillators. In Sect. 3, the circuit implementation and measurement setup are described. The measurement results are shown in Sect. 4. A discussion is given in Sect. 5, and Sect. 6 concludes this paper. Part of this work is based on a conference proceedings. (7) Figure 1 shows a conceptual image of this work. The upper part shows the case where only one oscillator is implemented on one chip. If the oscillator is inoperable, the chip also will be inoperable. However, as shown in the bottom part, when there are several oscillators on one chip, the chip will operate provided at least one oscillator is in operation. Therefore, by integrating multiple oscillators on one chip, the probability that the chip will operate is increased. Typical oscillators do not take up a significant area of a system. However, as reported in a previous study, a small area does not necessarily mean that the variation in the transistor characteristics is smaller, but that the threshold voltage variation may be larger than in the case of a large area. (8) A faulty oscillator will result in poor operation of the entire system. Therefore, the proposed multi-ring-oscillator circuit is effective in reducing the additional area and preventing malfunctions. If designers cannot accept the additional power consumption, postfabrication such as focused ion beam (FIB) trimming based on preshipment testing will be helpful for realizing practical applications. Figure 2 shows a schematic of the proposed stochastic oscillator with multiple ring oscillators and an OR-gate. This is an example of a physical implementation using standard CMOS technologies. The circuit consists of four 21-stage ring oscillators with inverters and an OR-gate. The number of ring-oscillator stages was determined from the bandwidth of the I/O circuitry and the feasibility of low-voltage operation. As stated in a previous paper, a smaller number of stages is better for low-voltage operation. (1) Four ring oscillators and the OR-gate have a common power-supply voltage, eliminating the need for a cost-hungry multi-supply/body-voltage approach. (2) As a typical example, we have determined the number of ring oscillators to be four. The number of ring oscillators can be determined by considering the trade-off between effectiveness and area/power overhead.

Circuit diagram and simulation results
To verify the effectiveness of the proposed approach, we performed SPICE simulation using the process design kit (PDK) of the 65 nm standard CMOS technology. For the OR-gate, we used a standard cell. Figure 3 shows the simulated waveforms of the proposed oscillator under the condition that the voltage source provides a 1-ms turn-on time and all transistors have the same performance without any process variation. As expected, identical oscillation frequencies were obtained. By the simulation, we confirmed that the proposed oscillator operated properly. However, generally speaking, transistors on a circuit have some degree of variation, especially in an advanced CMOS process. To consider the impact of these variations on output waveforms, we performed the simulation for a transistor of a different size. Figure 4 shows the results of the simulation. In Fig. 4, we increased the size of only one inverter among eighty-four inverters by 10%. Compared with the results shown in Fig. 3, the output variation is very large, and we found that the duty ratio varies with time. Thus, from this result, we inferred that the variation in the size of transistors has an effect on output waveforms when multiple oscillators perform properly. The minimum supply voltage of the oscillator was unchanged, which indicates the effectiveness of the proposed approach.

Test Chip and Measurement Setup
A test chip was designed and fabricated using 65 nm standard CMOS technology to verify the effectiveness of the proposed approach. All the transistors have the same size in the fabricated circuit. Considering the nondefective rate, we used a standard cell of the OR-gate as we did in the previous simulations. In addition, a level shifter was used to facilitate the observation of the output. The output of the OR-gate is connected to the level shifter. Figure 5 shows a micrograph of the test chip. The white dotted line shows the core area (which includes four ring oscillators, the OR-gate, and the level shifter) and I/O pads, which occupy an area of 120 × 295 μm 2 . The core area itself is also enclosed by a white solid line. Figure 6 shows the measurement setup. In the measurement, a manual probing technique was adopted. The probe system α100 (Apollowave Corp., Japan) was utilized, as were three voltage sources and one sampling oscilloscope. The three voltage sources are used for the four ring oscillators and OR-gate, the level shifter, and the I/O pads. We used a separate voltage source for the level shifter to reduce the effect of noise and to verify the current consumption. Figure 7 shows the measured waveforms of the output of the proposed stochastic oscillator with multiple ring oscillators. The minimum operation voltage of the proposed oscillator was 105 mV. If only one ring oscillator works properly, the output waveforms show no fluctuation. However, the output waveforms we obtained show some fluctuations. Therefore, we concluded that there were variations in the size of transistors, and that at least two ring oscillators were working properly.   Figure 8 shows the average measured oscillating frequency as a function of the applied power-supply voltage (V dd ) from 105 to 300 mV. As shown in Fig. 8, we observed that the oscillating frequency decreases as the power-supply voltage decreases, as expected. At the minimum supply voltage, the output waveform has an identical duty cycle to that of an ideal pulse wave, as expected.

Discussion
Although the proposed approach enables low-voltage operation, there are some disadvantages. First, the required footprint increases, which leads to increased costs. Secondly, the required power consumption increases. Even if only the best-fabricated oscillator operates, other non-operating oscillators cause power leakage. In general, the area and power of one oscillator do not play dominant roles in the total power consumption. However, these disadvantages must be carefully addressed in practical applications.  It is generally believed that the Dennard Scaling of MOSFETs has declined considerably. In other words, miniaturization does not necessarily lead to improved circuit performance. In a previous study, it was found that the variation in the threshold voltage tends to be smaller as the area of the transistor increases. (8) Consequently, the method of increasing the area of the transistor using a single oscillator is considered to be effective in ensuring the performance of the circuit. Figure 9 shows the change in power consumption obtained by the simulation in which the number of ring oscillators was varied. The number of stages of the ring oscillators was set to 21. The areas considered in these simulations are assumed to be identical; for example, the transistor size in the circuit containing four ring oscillators is one-fourth the size of the transistor containing one-ring oscillator. The power consumption of the circuits containing multiple-ring oscillators includes the power consumption of the ring oscillator and the OR-gate. The simulation results confirmed that there is a trade-off between the degree of effectiveness, additional cost, and power overhead. By increasing the number of implemented oscillators, a lower-voltage operation is expected because the possibility of encountering less-varied ring oscillators increases when considering statistical studies. In addition, moderately parallel-connected ring oscillators are expected to reduce power consumption. For the same area as in the simulation, the parallel connection of four ring oscillators has the lowest power consumption. In contrast, too many oscillators cause more additional cost and power overhead. Thus, for practical applications, designers should carefully consider this trade-off.
One of the most similar approaches is the individual body biasing approach. (2) The conventional approach is effective for lowering the minimum supply voltage. However, the conventional approach requires a body-biasing generator, which requires a considerable additional area and power overhead. Thus, the proposed approach is better than the conventional one from the viewpoint of additional overhead.
As the proposed concept enables low-voltage and low-power operation in a relatively small area, it can be used as a temperature sensor or for in situ supply-noise mapping in a processor. Because these applications are desired to operate in a small area and with low power consumption, the adoption of the proposed concept would be highly effective. (9,10)

Conclusions
In this paper, we proposed and demonstrated a stochastic oscillator with multiple ring oscillators and an OR-gate enabling low-voltage operation for the first time. Its operation was confirmed through SPICE simulation and measurement of a 65 nm CMOS prototype chip. The measured output waveforms exhibit variation in the duty ratio, which shows that the proposed approach performed properly. As well as a reduction in the minimum supply voltage, a decrease in oscillation frequency was confirmed.