Supersteep Retrograde Channel on FinFET

Supersteep retrograde (SSR) technology can improve the short-channel effects (SCEs) when device size is reduced. Additionally, it can reduce the leakage current of a device. We investigated the optimal process conditions for SSR technology. We determined whether the electromagnetic parameters of N-type and P-type fin field-effect transistors (FinFETs) can be improved using SSR technology through technology computer-aided design (TCAD) simulation. After the simulation, the transfer characteristic curve (ID–VG), Ion, Ioff, drain-induced barrier lowering (DIBL), subthreshold swing (SS), and mobility parameters were employed to determine the advantages and disadvantages of using SSR technology for a FinFET. The results revealed that when SSR technology is used for a FinFET, superior characteristics are observed even when the width and length of the FinFET are reduced. The SSR simulation results reveal that, as the doping concentration in SSR technology increases, the electrical properties of the device improve.


Introduction
To follow Moore's law and resolve the short-channel effects (SCEs) attributable to the size reduction of two-dimensional (2D) transistors, the three-dimensional (3D) transistor was invented. (1,2)(5) SSR technology is a vertical heterogeneity doping technology used in channel engineering. (6)We aimed to identify the optimal size of FinFETs to which SSR technology is applied.Because of simulation software limitations, uniform doping was conducted in this research.We compared a FinFET before using SSR technology with one after using SSR technology by referring to the 7 nm process structure of the Taiwan Semiconductor Manufacturing Company (TSMC). (7)By referring to the 2015 International Technology Roadmap for Semiconductors (ITRS) 2.0, we determined that, for a FinFET, the gate voltage (V G ) is 0.8 V and the drain voltage (V D ) is 0.7 V. (8)

Materials and Methods
We used technology computer-aided design (TCAD) simulation to compare the structure of a FinFET before and after SSR doping (the FinFET in the present study is referred to as the SSR FinFET after SSR doping). (9)The structure of the SSR FinFET is displayed in Fig. 1.The red characters in the figure are the SSR doping variables used in this study.
The experimental steps are as follows.
Step 1: We use a 3D mesh plot to ascertain the optimal height and width of the FinFET structure.The FinFET heights (FHs) in this study are 40, 45, and 50 nm.FinFET widths (FWs) are 3, 4, and 5 nm.
Step 2: The size of the optimal structure obtained after Step 1 is used to plot the I D -V G curve.
Then, the optimal SSR doping concentration is obtained.
Step 3: We plot the I D -V G curve to ascertain the optimum SSR depth (doping range).
Step 4: Using the optimization results, the characteristics of the voltage and current of the FinFET and SSR FinFET are compared.Tables 1 and 2 present the optimal electrical property simulation parameters and variables of doping adjusted with reference to the 2015 ITRS 2.0.are smaller.Figure 2(c) indicates that the on-off current ratio (I on -I off ) is higher when FW and FH are smaller.Figure 2(d) shows that subthreshold swing (SS) is higher when FW and FH are smaller.The results for a P-type FinFET are presented in Fig. 3 and are similar to those for the N-type FinFET.Therefore, the optimal Fin structure has an FH of 40 nm and an FW of 3 nm.

Optimal depth of SSR doping
In Figs. 4 and 5, on the basis of the principle of I on /I off, the I on and I off at the retrograde depth (Re.depth) of 10 nm are the lowest.The I off at the Re.depth of 20 nm is the second lowest, and I on is the highest.After analyzing I on and I off , determining whether the electrical properties are more favorable at the Re.depth of 10 or 20 nm is difficult.The SS curve is steeper and the SS value is smaller when I on is larger according to the on-off current ratio.Thus, optimal electrical properties are observed at the Re.depth of 20 nm.Table 3 shows the electrical properties of our structures.
Subsequently, we use the same SS principle to determine the electrical properties (Fig. 6).The Re.depth of 20 nm is optimal for obtaining superior electrical properties.Moreover, the   Re.depths of 10 and 20 nm have high I off values even when the device is in the off state.This implies that the device produces some leakage current.Therefore, the Re.depth of 20 nm is optimal at a fixed doping concentration.

Optimal SSR doping concentration
On the basis of the conclusion drawn in Sect.3.2, the Re.depth is 20 nm, and three doping concentrations, 5 × 10 17 , 10 18 , and 10 19 cm −3 , are employed to identify the optimal doping concentration.By analyzing the on-off current ratio in Fig. 7, we observe that the lowest I on is obtained at the doping concentration of 10 19 cm −3 .Moreover, the I off obtained when the doping concentration is 10 19 cm −3 is considerably lower than those obtained at the other two concentrations.The electrical properties at the doping concentration of 10 19 cm −3 are optimal.That is, the optimal doping concentration is 10 19 cm −3 when the optimal Re.depth is 20 nm.

Device structure
Figure 8 displays the structure and electrical properties observed after TCAD simulations for the FinFET and SSR FinFET.The leakage current was significantly reduced, and the current was uniform in the SSR FinFET, as presented in Figs.8(b) and 8(d).

I D -V G curve of FinFET and SSR FinFET
A significant decrease in I off is observed in the N-type and P-type FinFETs after SSR doping, as presented in Fig. 9.This implies that the SSR FinFET has an optimal I off and that SS is superior.

Drain-induced barrier lowering (DIBL)
Figure 10 demonstrates that the DIBL values are small and that the ability of the device to control the gate voltage is superior.We can observe that the difference in V t , where V D   is between 1 and 0.05 with retrograde doping, is small after SSR doping.Therefore, the gate voltage control of the SSR FinFET is superior to that of the FinFET.Table 4 shows the summary table of DIBL (FinFET vs SSR FinFET) characteristics.

Conclusions
SSR technology has been used for a long time, (10) and this study was conducted to identify the optimal parameters for using SSR technology, including the optimum SSR doping depth and concentration under an optimized structure.We are aware that SSR technology can overcome SCEs.In a previous study, SSR technology was used for a larger device and doping in the well. (11)In this study, we employed SSR technology for a small device using a channel.The most crucial finding from the simulation results is that SSR technology can effectively inhibit leakage current, as presented in Fig. 8.
The simulation results in Sect. 3 indicate that the electrical parameters, such as I off , DIBL, SS, and mobility, (12) of the components of the N-type and P-type FinFETs improve after using SSR technology.
In summary, although I on was reduced after SSR doping, I off decreased considerably.Thus, some sacrifice of I on is acceptable.Additionally, the DIBL values decreased considerably to 0.28 times less than those before SSR doping.SS decreased to a certain degree.In terms of mobility, SSR elements have superior electron mobility because the lattice scattering can be reduced effectively using SSR technology.
The TCAD simulation results revealed that the N-type and P-type FinFETs have a superior electrical performance when the width and height are small before using SSR technology.To identify the optimal component sizes, we compared the electrical properties before and after using SSR technology.We determined that the overall electrical performance is superior when the SSR doping concentration is high, and that the optimal doping depth is located at the median position for an optimal structure.

3. 1
Figure 2 displays the simulation results for the N-type FinFET.Figure 2(a) shows that Ion is higher when FH and FW are higher.Figure 2(b) reveals that I off is smaller when FW and FH

Figure 2 (
Figure 2 displays the simulation results for the N-type FinFET.Figure 2(a) shows that Ion is higher when FH and FW are higher.Figure 2(b) reveals that I off is smaller when FW and FH

Figure 2 (
Figure 2 displays the simulation results for the N-type FinFET.Figure 2(a) shows that Ion is higher when FH and FW are higher.Figure 2(b) reveals that I off is smaller when FW and FH parameters of N-type and P-type FinFETs.S/D doping (cm −3 ) Channel doping (cm −3 )

Fig. 2 .Fig. 3 .
Fig. 2. (Color online) Simulation plots of the electrical properties of the N-type FinFET: (a) I on , (b) I off , (c) I on -I off ratio, and (d) SS.

Fig. 8 .
Fig. 8. (Color online) Structural and electrical property diagrams obtained after TCAD simulation.(a) Structure of the FinFET.(b) Structure of the SSR FinFET.(c) Electrical properties of the FinFET.(d) Electrical properties of the SSR FinFET.